/*
 * @file mx6ull_solar_l8.h
 * @brief Configuration settings for the Freescale i.MX6UL Solar L8 Board.
 * @author m.hirobe@co-nss.co.jp
 * @date 2019-08-29
 */
#ifndef __MX6ULL_SOLAR_L8_CONFIG_H
#define __MX6ULL_SOLAR_L8_CONFIG_H


#include <asm/arch/imx-regs.h>
#include <linux/sizes.h>
#include "mx6_common.h"
#include <asm/imx-common/gpio.h>

#ifdef CONFIG_SECURE_BOOT
#ifndef CONFIG_CSF_SIZE
#define CONFIG_CSF_SIZE 0x4000
#endif
#endif

#define is_mx6ull_9x9_evk()	CONFIG_IS_ENABLED(TARGET_MX6ULL_9X9_EVK)

#define PHYS_SDRAM_SIZE		SZ_512M
#undef CONFIG_LDO_BYPASS_CHECK

#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG

/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)

#define CONFIG_MXC_UART
#define CONFIG_MXC_UART_BASE		UART1_BASE

/* watchdog */
#define CONFIG_IMX_WATCHDOG

/* MMC Configs */
#ifdef CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC2_BASE_ADDR

/* NAND pin conflicts with usdhc2 */
#ifdef CONFIG_CMD_NAND
#define CONFIG_SYS_FSL_USDHC_NUM	1
#else
#define CONFIG_SYS_FSL_USDHC_NUM	2
#endif
#endif

/* I2C configs */
#ifdef CONFIG_CMD_I2C
#define CONFIG_SYS_I2C_MXC
#define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
#define CONFIG_SYS_I2C_SPEED		400000
#endif
#define CONFIG_SYS_MXC_I2C2_SPEED	(400000)
#define I2C_EEPROM_BUSNO			(1)
#define I2C_EEPROM_SLAVE_ADDR		(0x50)

#define CONFIG_SYS_MMC_IMG_LOAD_PART	2

#define CONFIG_CMD_READ
#define CONFIG_SERIAL_TAG
#define CONFIG_FASTBOOT_USB_DEV 0

#undef CONFIG_SYS_PROMPT
#define CONFIG_SYS_PROMPT "jhrwl8 U-Boot > "

/* boot mode */
#define SOLAR_BOOTMODE_NORMAL	(0)
#define SOLAR_BOOTMODE_TEST	(1)
#define SOLAR_BOOTMODE_JET	(3)


/* ethernet config */
#define CONFIG_ETHADDR		00:04:9F:01:D6:FF
#define CONFIG_SERVERIP		192.168.0.231
#define CONFIG_IPADDR		192.168.0.100
#define CONFIG_NETMASK		255.255.255.0
#define CONFIG_GATEWAYIP	0.0.0.0
#if defined(CONFIG_NAND_BOOT)
#define CONFIG_ENV_IS_IN_NAND
#undef CONFIG_LOADADDR
#define CONFIG_LOADADDR		0x82000000
#define CONFIG_EXTRA_ENV_SETTINGS \
	"bootcmd=flboot\0"						\
	"loadaddr=0x82000000\0"					\
	"netdev=eth0\0"							\
	"uboot=u-boot.bin\0"						\
	"uboot_addr=0xa0000000\0"					\
	"kernel=uImage\0"						\
	"nfsroot=/nfsroot/rootfs_prod\0"				\
	"ubiroot=ubi0:rootfs_a\0"					\
	"bootmode_args=normal\0"					\
	"bootargs_base=setenv bootargs console=ttymxc0,115200"		\
		" bootcmd=${bootmode_args}\0"				\
	"bootargs_nfs=setenv bootargs ${bootargs}"			\
		" root=/dev/nfs rw"					\
		" ip=${ipaddr} nfsroot=${serverip}:${nfsroot},v3,tcp\0"	\
	"bootcmd_nfs=run bootargs_base bootargs_nfs;"			\
		" tftpboot ${loadaddr} ${kernel};bootm\0"		\
	"bootargs_nand=setenv bootargs ${bootargs} root=${ubiroot}"	\
		" ubi.mtd=8,4096 rootfstype=ubifs rw\0"			\
	"nandboot=bootm ${loadaddr}#cfg-1\0"				\
	"bootcmd_nand=run bootargs_base bootargs_nand;"			\
		" nand read ${loadaddr} 0x300000 0x800000;run nandboot\0"
#else
#define CONFIG_ENV_IS_IN_MMC
#define CONFIG_EXTRA_ENV_SETTINGS \
	"bootcmd=run boot_mmc\0" \
	"image=kernel.itb\0" \
	"console=ttymxc0\0" \
	"loadaddr=0x82000000\0" \
	"initrd_high=0xffffffff\0" \
	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
	"mmcrootfs=" CONFIG_MMCROOT " rootwait rw\0" \
	"mmcautodetect=yes\0" \
	"mmcargs=setenv bootargs console=${console},${baudrate} " \
		"root=${mmcrootfs}\0" \
	"loadimage=ext4load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
	"boot_mmc=run mmcargs;run loadimage;bootm ${loadaddr}#cfg-2\0"
#endif

/* Miscellaneous configurable options */
#define CONFIG_SYS_MEMTEST_START	0x80000000
#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x2000000)

#define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
#define CONFIG_SYS_HZ			1000

/* Physical Memory Map */
#define CONFIG_NR_DRAM_BANKS		1
#define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR

#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
#define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
#define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE

#define CONFIG_SYS_INIT_SP_OFFSET \
	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR \
	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)

/* environment organization */
#define CONFIG_SYS_MMC_ENV_DEV		1	/* USDHC2 */
#define CONFIG_SYS_MMC_ENV_PART		0	/* user area */
#define CONFIG_MMCROOT			"/dev/mmcblk0p3"  /* USDHC2 */

#define CONFIG_IMX_THERMAL

#define CONFIG_IOMUX_LPSR

#ifdef CONFIG_CMD_NAND
#define CONFIG_CMD_NAND_TRIMFFS

#define CONFIG_NAND_MXS
#define CONFIG_SYS_MAX_NAND_DEVICE	1
#define CONFIG_SYS_NAND_BASE		0x40000000
#define CONFIG_SYS_NAND_5_ADDR_CYCLE
#define CONFIG_SYS_NAND_ONFI_DETECTION

/* DMA stuff, needed for GPMI/MXS NAND support */
#define CONFIG_APBH_DMA
#define CONFIG_APBH_DMA_BURST
#define CONFIG_APBH_DMA_BURST8
#endif

#define CONFIG_SYS_REDUNDAND_ENVIRONMENT
#define CONFIG_ENV_SIZE			SZ_8K
#if defined(CONFIG_ENV_IS_IN_MMC)
#define CONFIG_ENV_OFFSET		(0x80400)
#elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
#define CONFIG_ENV_OFFSET		(896 * 1024)
#define CONFIG_ENV_SECT_SIZE		(64 * 1024)
#define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
#define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
#define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
#define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
#elif defined(CONFIG_ENV_IS_IN_NAND)
#undef CONFIG_ENV_SIZE
#define CONFIG_ENV_OFFSET		(0x200000)
#define CONFIG_ENV_SECT_SIZE		(128 << 10)
#define CONFIG_ENV_SIZE			(CONFIG_ENV_SECT_SIZE * 2)
#define CONFIG_ENV_OFFSET_REDUND	(0x280000)
#define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
#endif

#ifdef CONFIG_FEC_MXC
#define CONFIG_MII
#define CONFIG_FEC_ENET_DEV		0

#if (CONFIG_FEC_ENET_DEV == 0)
#define IMX_FEC_BASE			ENET_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR          0x0
#define CONFIG_FEC_XCV_TYPE             RMII
#ifdef CONFIG_DM_ETH
#define CONFIG_ETHPRIME			"eth0"
#else
#define CONFIG_ETHPRIME			"FEC0"
#endif
#elif (CONFIG_FEC_ENET_DEV == 1)
#define IMX_FEC_BASE			ENET2_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR		0x1
#define CONFIG_FEC_XCV_TYPE		RMII
#ifdef CONFIG_DM_ETH
#define CONFIG_ETHPRIME			"eth1"
#else
#define CONFIG_ETHPRIME			"FEC1"
#endif
#endif
#define CONFIG_FEC_MXC_MDIO_BASE ENET_BASE_ADDR
#endif
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_MXC_USB_PORTSC		(PORT_PTS_UTMI | PORT_PTS_PTW)
#endif
#define CONFIG_MODULE_FUSE
#define CONFIG_OF_SYSTEM_SETUP

#endif
