config BDU_UART1
	bool "Use UART1 for Linux (for BDU)"
	depends on BDH

config EMMA3PF
	bool "EMMA3PF support"
	depends on BPN
	default n

config EMMA3R
	bool "EMMA3R support"
	depends on BDH
	default n

choice
	prompt "Kernel ram start address"
	depends on BDH || BPN
	default RAM_BASE_0C313000

config RAM_BASE_0C313000
	bool "0x0C313000"

config RAM_BASE_0DDD5000
	bool "0x0DDD5000"

config RAM_BASE_0DFCF000
	bool "0x0DFCF000"

config RAM_BASE_0E300000
	bool "0x0E300000"

config RAM_BASE_0E800000
	bool "0x0E800000"

config RAM_BASE_0EA00000
	bool "0x0EA00000"

config RAM_BASE_0EC00000
	bool "0x0EC00000"

endchoice

config RAM_BASE
	hex
	depends on BDH || BPN
	default "0x0C313000" if RAM_BASE_0C313000
	default "0x0DDD5000" if RAM_BASE_0DDD5000
	default "0x0DFCF000" if RAM_BASE_0DFCF000
	default "0x0E300000" if RAM_BASE_0E300000
	default "0x0E800000" if RAM_BASE_0E800000
	default "0x0EA00000" if RAM_BASE_0EA00000
	default "0x0EC00000"

config EXC_BASE
	hex
	depends on BDH || BPN
	default "0x8C313200" if RAM_BASE_0C313000
	default "0x8DDD5200" if RAM_BASE_0DDD5000
	default "0x8DFCF200" if RAM_BASE_0DFCF000
	default "0x8E300200" if RAM_BASE_0E300000
	default "0x8E800200" if RAM_BASE_0E800000
	default "0x8EA00200" if RAM_BASE_0EA00000
	default "0x8EC00200"

config LOAD_BASE
	hex
	depends on BDH || BPN
	default "0xffffffff8C315000" if RAM_BASE_0C313000
	default "0xffffffff8DDD7000" if RAM_BASE_0DDD5000
	default "0xffffffff8DFD1000" if RAM_BASE_0DFCF000
	default "0xffffffff8E302000" if RAM_BASE_0E300000
	default "0xffffffff8E802000" if RAM_BASE_0E800000
	default "0xffffffff8EA02000" if RAM_BASE_0EA00000
	default "0xffffffff8EC02000"

config ENABLE_TLB_RESERVE
	bool "Reserve TLB for ITRON (for BDH)"
	depends on BDH
	default n

config RESERVE_TLB
       int "Num of reserve TLB "
       depends on ENABLE_TLB_RESERVE
       default "8"

config RESERVE_ASID
       hex "ASID value for ITRON"
       depends on ENABLE_TLB_RESERVE
       default "0x80"
