#ifndef __VIXS_DMA_FUNC_H_
#define  __VIXS_DMA_FUNC_H_

//#define XC3ARC_BUILD

//#define VIXSDMA_DEBUG
#ifdef VIXSDMA_DEBUG
#define VIXSDMA_PRINTK(format,args...) printk(KERN_DEBUG format,##args)
#else
#define VIXSDMA_PRINTK(format,args...)
#endif

#define	gcc_packed	__attribute__((packed))

//DMA Related registers
#define	VIXS_CG_RESET_REG 0x0000
    #define VIXS_CG_RESET_REG_DMA_RESET_MASK                          0x00000002


#define	VIXS_DMA_DQ_PTR0 0x0C00
#define VIXS_DMA_DIRECT_LDST_A 0x0C88
#define VIXS_DMA_DIRECT_LSRC_A 0x0C80
#define VIXS_DMA_DIRECT_UDST_A 0x0C8C
#define VIXS_DMA_DIRECT_USRC_A 0x0C84
#define  VIXS_DMA_DIRECT_DMACMD_A 0x0C90
#define  VIXS_DMA_DIRECT_DMACW_A 0x0C94

#define VIXS_DMA_DIRECT_LDST_B 0x0CA8
#define VIXS_DMA_DIRECT_LSRC_B 0x0CA0
#define VIXS_DMA_DIRECT_UDST_B 0x0CAC
#define VIXS_DMA_DIRECT_USRC_B 0x0CA4
#define  VIXS_DMA_DIRECT_DMACMD_B 0x0CB0
#define  VIXS_DMA_DIRECT_DMACW_B 0x0CB4

#define VIXS_DMA_STATUS     0x0C34
    #define VIXS_DMA_DIRECT_A_MASK  0x4
    #define VIXS_DMA_DIRECT_B_MASK  0x8

#define	VIXS_DMA_HOST_INT_STATUS 0x0C50
    #define VIXS_DMA_HOST_INT_STATUS_XFER_DONE0_MASK                  0x00000001
    #define VIXS_DMA_HOST_INT_STATUS_XFER_DONEA_MASK                  0x00000004
    #define VIXS_DMA_HOST_INT_STATUS_XFER_DONEB_MASK                  0x00000008

#define	VIXS_DMA_HOST_INT_MASK 0x0C54
    #define VIXS_DMA_HOST_INT_MASK_XFER_DONE0_MASK             0x00000001
    #define VIXS_DMA_HOST_INT_MASK_XFER_DONEA_MASK             0x00000004
    #define VIXS_DMA_HOST_INT_MASK_XFER_DONEB_MASK             0x00000008

#define	VIXS_DMA_MIPS_INT_STATUS 0x0C58
    #define VIXS_DMA_MIPS_INT_STATUS_XFER_DONE0_MASK                  0x00000001
    #define VIXS_DMA_MIPS_INT_STATUS_XFER_DONEA_MASK                  0x00000004
    #define VIXS_DMA_MIPS_INT_STATUS_XFER_DONEB_MASK                  0x00000008

#define	VIXS_DMA_MIPS_INT_MASK 0x0C5C
    #define VIXS_DMA_MIPS_INT_MASK_XFER_DONE0_MASK             0x00000001
    #define VIXS_DMA_MIPS_INT_MASK_XFER_DONEA_MASK             0x00000004
    #define VIXS_DMA_MIPS_INT_MASK_XFER_DONEB_MASK             0x00000008

#define	VIXS_MIPS4_INTERRUPT 0x04D8
#define	VIXS_MIPS4_INTERRUPT_MASK 0x04DC
    #define VIXS_MIPS4_INTERRUPT_DMA_INT_MASK                         0x00000100
#define	VIXS_HOST_INTERRUPT 0x0414
#define	VIXS_HOST_INTERRUPT_MASK 0x0418
    #define VIXS_HOST_INTERRUPT_DMA_INT_MASK                          0x00000100


#define VIXS_DMA_MAX_TRANSFER_SIZE	0x10000


#define VIXS_DMA_NOT_EOL            (0 << 31)
#define VIXS_DMA_EOL                (1 << 31)
#define	VIXS_DMA_INTMIPS			(1 << 29)
#define VIXS_DMA_INTHOST			(1 << 28)
#define VIXS_DMA_SRC_FRAME			(1 << 24)
#define VIXS_DMA_SRC_SYSTEM			(0 << 24)
#define VIXS_DMA_DST_FRAME			(1 << 25)
#define VIXS_DMA_DST_SYSTEM			(0 << 25)
#define VIXS_DMA_SWAPCTRL_32_BIT        (2<<26)



#define VIXS_DMA_HW_MUTEX                    0x04C8


#ifndef VIXS_VCOMM_DRV
#ifdef XC3ARC_BUILD
#define DMA_INTERLOCK_FUNC_ID	            (0x2)
#else
#define DMA_INTERLOCK_FUNC_ID	            (0x3)
#endif
#else
#ifdef XC3ARC_BUILD
#define DMA_INTERLOCK_FUNC_ID	            (0x4)
#else
#define DMA_INTERLOCK_FUNC_ID	            (0x5)
#endif
#endif

#define vixs_reg_writel(val, addr)  writel(val, g_vixs_dma_info.reg_base + addr)
#define vixs_reg_readl(addr)          readl(g_vixs_dma_info.reg_base + addr)


typedef struct
{
    unsigned int                dma_host_int_mask;
    unsigned int                dma_host_int_status;
} VIXSDMAREGINFO, *PVIXSDMAREGINFO;

typedef struct
{
    unsigned int reg_base;
    VIXSDMAREGINFO	reg_info;    
    struct pci_dev          *ppcidev;
    unsigned int sync_obj;
    //struct semaphore dma_mutex;  
    spinlock_t  lock;	
    unsigned int backup_int_mask_reg;
} VIXSDMAINFO, PVIXSDMAINFO;


#define CMD_DMA_HOST_TO_XC3FB	0xda01
#define CMD_DMA_XC3FB_TO_HOST	0xda02
#define CMD_DMA_HOST_TO_PCIFB	0xda03
#define CMD_DMA_PCIFB_TO_HOST	0xda04

typedef struct {
    unsigned int cmd;					//command
    unsigned int src_addr;					//source address
    unsigned int dest_addr;					//destination address
    unsigned int transfer_len;			//transfer length in byte
    unsigned int pci_mappd_addr;            //pci mapped physical address
} vixs_dma_cmd_struct, *pvixs_dma_cmd_struct;


extern int vixsdma_init(unsigned int reg_base, unsigned int irq_num, struct pci_dev  *ppcidev) ;
extern int vixsdma_ioctl (pvixs_dma_cmd_struct pcmd);
#endif

