/*
 * sni_ave.h
 * Copyright (c) 2016-2017 Socionext Inc.
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#ifndef _SNI_AVE_H_
#define _SNI_AVE_H_

/* config */
#define DRIVERNAME		"ave"
#define AVE_GRST_DELAY_MSEC	(200)

#define AVE_MIN_XMITSIZE	(60)
#define AVE_MAX_RXDC_NUM	(768)
#define AVE_MAX_TXDC_NUM	(256)
#if PKTBUFSRX > AVE_MAX_RXDC_NUM
#	error PKTBUFSRX too big (PKTBUFSRX > AVE_MAXRXDC_NUM)
#endif

/* invalidate cache */
static inline void ave_cache_invalidate(uintptr_t vaddr, int len)
{
	invalidate_dcache_range(rounddown(vaddr, ARCH_DMA_MINALIGN),
				roundup(vaddr + len, ARCH_DMA_MINALIGN));
}

/* flush cache */
static inline void ave_cache_flush(uintptr_t vaddr, int len)
{
	flush_dcache_range(rounddown(vaddr, ARCH_DMA_MINALIGN),
			   roundup(vaddr + len, ARCH_DMA_MINALIGN));
}

/* registers */
#define AVE_IDR_VALUE			(0x41564534)	/* AVE4 */

/* registers */
#define AVE_IDR				0x0000
#define AVE_VR				0x0004
#define AVE_GRR				0x0008
#define AVE_CFGR			0x000c
#define AVE_GIMR			0x0100
#define AVE_GISR			0x0104
#define AVE_GTICR			0x0108
#define AVE_TXCR			0x0200
#define AVE_RXCR			0x0204
#define AVE_RXMAC1R			0x0208
#define AVE_RXMAC2R			0x020c
#define AVE_PASCR			0x0210
#define AVE_MDIOCTR			0x0214
#define AVE_MDIOAR			0x0218
#define AVE_MDIOWDR			0x021c
#define AVE_MDIOSR			0x0220
#define AVE_MDIORDR			0x0224
#define AVE_JSPR			0x0228
#define AVE_DESCC			0x0300
#define AVE_TXDC			0x0304
#define AVE_RXDC			0x0308
#define AVE_TXDCP			0x031c
#define AVE_RXDCP			0x0320
#define AVE_TXDWBP			0x0334
#define AVE_RXDWBP			0x0338
#define AVE_IIRQC			0x034c
#define AVE_BFCR			0x0400
#define AVE_GFCR			0x0404
#define AVE_RXFC			0x0410
#define AVE_RXOVFFC			0x0414

#define AVE_TXDM_32			0x1000
#define AVE_TXDM_64			0x1000
#define AVE_RXDM_32			0x1800
#define AVE_RXDM_64			0x1c00

/* for AVE_RMII */
#define AVE_RSTCTL			0x8028
#define AVE_LINKSEL			0x8034

/* descriptors */
#define AVE_TXDM_CMDSTS			(0)
#define AVE_TXDM_BUFPTR			(1)
#define AVE_TXDM_OWN			(0x80000000)
#define AVE_TXDM_OK			(0x08000000)
#define AVE_TXDM_SIZE_MASK		(0x000007ff)
#define AVE_RXDM_CMDSTS			AVE_TXDM_CMDSTS
#define AVE_RXDM_BUFPTR			AVE_TXDM_BUFPTR
#define AVE_RXDM_OWN			AVE_TXDM_OWN
#define AVE_RXDM_OK			AVE_TXDM_OK
#define AVE_RXDM_SIZE_MASK		AVE_TXDM_SIZE_MASK

/* bits of registers */
#define AVE_GRR_GRST			(0x00000001)
#define AVE_GRR_CLR			(0x00000000)
#define AVE_CFGR_MII			(0x08000000)
#define AVE_RXCR_RXEN			(0x40000000)
#define AVE_RXCR_FDUPEN			(0x00400000)
#define AVE_RXCR_FLOCTR			(0x00200000)
#define AVE_RXCR_MTU			(1518)
#define AVE_RXCR_HDUP			(0x00000000)
#define AVE_TXCR_TXSPD_100		(0x00010000)
#define AVE_TXCR_TXSPD_1G		(0x00020000)
#define AVE_TXCR_FLOCTR			(0x00040000)
#define AVE_GIMR_CLR			(0x00000000)
#define AVE_GISR_CLR			(0xFFFFFFFF)
#define AVE_MDIOCTR_RREQ		(0x00000008)
#define AVE_MDIOCTR_WREQ		(0x00000004)
#define AVE_MDIOSR_STS			(0x00000001)

#define AVE_DESCC_RXDSTPST		(0x00100010)
#define AVE_DESCC_RDE			(0x00000100)
#define AVE_DESCC_RXDSTP		(0x00000010)
#define AVE_DESCC_TDE			(0x00000001)

#define AVE_TXDC_SIZE(priv, num)	(((priv)->is_desc_64bit) \
					 ? ((num)*0x000c0000)	 \
					 : ((num)*0x00080000))
#define AVE_RXDC_SIZE(priv, num)	(((priv)->is_desc_64bit) \
					 ? ((num)*0x000c0000)	 \
					 : ((num)*0x00080000))

#define AVE_RSTCTRL_RMIIRST		(0x00010000)
#define AVE_LINKSEL_100M		(0x00000001)
#define AVE_TX_CMDSTS_LAST		(0x02000000)
#define AVE_TX_CMDSTS_1ST		(0x04000000)

#endif /*_SNI_AVE_H_*/
